| UTC+2 | Thursday May 27, 2021 | |
|---|---|---|
| 14:00 – 15:00 | Keynote Address Secure Hardware Design: Starting from the Roots of Trust Ingrid VERBAUWHEDE Professor – KU Leuven – Leuven, Belgium |
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| 15:00 – 16:30 | PhD Forum, McCluskey Award & Posters Session | |
| P1 | A Tutorial of How to Ensure High Automotive Microcontroller Quality, Ralf ARNOLD (Infineon Technologies – Germany) | |
| P2 | A 3DIC interconnect interface test and repair scheme based on Hybrid IEEE1838 Die Wrapper Register and BIST circuit, Changming CUI, Junlin HUANG (Hisilicon – China) | |
| P3 | Opacity preserving Countermeasure using Finite State Machines against Differential Scan Attacks, Sk. Subidh ALI (IIT Bhilai – India), Yogendra SAO (Indian Institute of Technology Bhilai – India), Santosh BISWAS (IIT Bhilai – India) | |
| P4 | Trustworthy computing on untrustworthy and Trojan-infected on-chip interconnects, Heba SALEM, Nigel TOPHAM (The University of Edinburgh – United Kingdom) | |
| P5 | Transit-Guard: An OS-based Defense Mechanism Against Transient Execution Attacks, Maria MUSHTAQ, David NOVO (LIRMM – France), Florent BRUGUIER, Pascal BENOIT (Universite de Montpellier – France), Muhammad Khurram BHATTI (Information Technology University – Pakistan) | |
| P6 | Chill Out: Freezing Attacks on Capacitors and DC/DC Converters, Obi NNOROM JR, Jalil MORRIS (Yale University – United States), Ilias GIECHASKIEL (Independent Researcher – United Kingdom), Jakub SZEFER (Yale University – United States) | |
| P7 | Hierarchical Fault Simulation of Deep Neural Networks on Multi-Core Systems, Masoomeh KARAMI, Mohammad-Hashem HAGHBAYAN (University of Turku – Finland), Masoumeh EBRAHIMI (KTH – Sweden), Antonio MIELE (Politecnico di Milano – Italy), Hannu TENHUNEN (KTH – Sweden), Juha PLOSILA (University of Turku – Finland) | |
| P8 | Analyzing the Impact of Approximate Adders on the Reliability of FPGA Accelerators, Ioannis TSOUNIS, Athanasios PAPADIMITRIOU, Mihalis PSARAKIS (University of Piraeus – Greece) | |
| P9 | Online Testing of a Row-Stationary Convolution Accelerator, Mohammad Rasoul ROSHANSHAH, katayoon BASHARKHAH, Zainalabedin NAVABI (University of Tehran – Iran, Islamic Republic of) | |
| P10 | Design of Fault-Tolerant and Thermally Stable XOR Gate in Quantum Dot Cellular Automata, Syed Farah NAZ, Ambika Prasad SHAH (Indian Institute of Technology Jammu), Suhaib AHMED (Baba Ghulam Shah Badshah University), Patrick GIRARD (LIRMM), Michael WALTL (Institute for Microelectronics, TU Wien) | |
| P11 | Automatic Inspection for Wafer Defect Detection with Unsupervised Clustering Techniques, Katherine Shu-Min LI (National Sun Yat-sen University – Taiwan), Leon Li-Yang CHEN (NXP Semiconductors Taiwan Ltd. – Taiwan), Peter Yi-Yu LIAO, Ken Chau-Cheung CHENG (NXP Semiconductor Taiwan Ltd. – Taiwan), Sying-Jyan WANG (National Chung-Hsing University – Taiwan), Andrew Yi-Ann HUANG, Leon CHOU, Nova Cheng-Yen TSAI, Chen-Shiun LEE (NXP Semiconductor Taiwan Ltd. – Taiwan), Gus Chang-Hung HAN (National Chung-Hsing University – Taiwan), Jwu E CHEN (NCU – Taiwan), Hsing-Chung LIANG (Chung Yuan Christian University – Taiwan), Chun-Lung HSU (Industrial Technology Research Institute – Taiwan) | |
| P12 | TDMS Test Scheduler: An Integrated Framework for Test Scheduling of DVFS-based SoCs with multiple voltage islands, Fotios VARTZIOTIS (University of Ioannina – Greece) | |
| P13 | GPU-based ATPG System by Scaling Memory Usage and Reducing Data Transfer, Hua-Ren LI, Hsing-Chung LIANG (Chung Yuan Christian University – Taiwan) | |
| McC1 | Leaky Hardware: Modeling and Exploiting Imperfections in Embedded Devices, Ilias GIECHASKIEL (University of Oxford) | |
| McC2 | Testing STT-MRAM: Manufacturing Defects, Fault Models, and Test Solutions, Lizhou WU (Delft University of Technology) | |
| McC3 | Security Techniques for Test Infrastructures, Emanuele VALEA (LIRMM – CNRS) | |
| McC4 | Efficient Post-Silicon Debug Framework for Future Many-Core Systems, Sidhartha Sankar ROUT (Indraprastha Institute of Information Technology) | |
| McC5 | Improving DRAM Performance, Security, and Reliability by Understanding and Exploiting DRAM Timing Parameter Margins, Jeremie KIM (Carnegie Mellon University) | |
| McC6 | Assessing Dependability of ML-driven Systems, Saurabh Jha (University of Illinois at Urbana-Champaign) | |
| McC7 | Effective techniques for systems validation and security, Aleksa Damljanovic (Politecnico di Torino) | |
| 16:30 – 18:00 | Global Test Community Quiz (GTCQ) | |
| 18:00 – 18:30 | Closing Session | |
| Legend | |
|---|---|
| Regular Session (S) | |
| Special Session (SS) | |
| Embedded Tutorials (ET) | |
| Industrial Session (IS) | |
| McCluskey Award | |
| PhD Forum & Posters | |
| Keynote | |
| Panel | |
| Vendor Session | |
| Regular Paper | |
| (CS) | Case Study Paper |
| (HT) | Hot Topic Paper |
| (P) | Poster |