Keynote Speakers

Building and Validating Advanced Quantum Systems

Keynote Monday, may 24th, 2021, 14:30 – 15:30 UTC+2

Oliver DIAL

Distinguished Research Staff Member – IBM TJ Watson Research Center – Yorktown Heights, NY, USA

Quantum computing is on the verge of dramatically changing the landscape of what is and is not computable. As numerous academic and industrial groups pursue this challenge with a variety of different physical underpinnings, the question of how do we test a quantum system becomes essential, both to provide metrics to guide research and development, and to answer comparative questions between dramatically different technologies.
Beginning with a brief introduction to quantum computing in general and superconducting qubits in specific, I will introduce metrics and measurements that we use to perform physical, component-level and system-level testing of quantum systems with specific references back to the underlying physical hardware as. Finally, I'll discuss where it appears the field will be in a few years time and the new characterization challenges that will introduce.

Oliver Dial is the technical lead for quantum hardware in IBM Quantum, with a research focus on novel and high performance multi-qubit systems. At IBM he has worked on qubit coherence and gates in both 2D and 3D Transmon systems. He joined IBM in 2012 having first entered the field of quantum computing as a post-doc at Harvard by demonstrating the first two-qubit gate between semiconductor singlet-triplet qubits and providing benchmark charge noise data for these systems. Dr. Dial received his PhD from MIT in 2007 for research in two-dimensional electron and hole systems.


From Wearables to Ingestibles and Invisibles: Disruptive New Health Devices and Their Path to Maturity & the Market

Keynote Tuesday, may 25th, 2021, 14:00 – 15:00 UTC+2

Chris VAN HOOF

Vice-President R&D – imec – Leuven, Belgium

Over the past decade wearables have had increasing impact in the health domain and predominantly in the cardiovascular field. Their relatively fast success was certainly aided by the presence of traditional vital sign or holter monitors which could act as so-called predicate devices. To make a similar difference in other medical fields, such as gastro-intestinal disorders and metabolic health, radically new device concepts are needed, such as ingestible sensors. These new device concepts do not have existing med tech counterpart devices to be compared to and this poses both regulatory and acceptance hurdles. Furthermore, apart from the hardware challenges, these devices will often rely on digital twin models. Acceptance of such AI algorithms is a compound challenge to their regulatory approval and acceptance. In this keynote, several of these new sensors and concepts will be presented as well as their expected path (and the hurdles) taking them from first demonstration to clinical studies and to market.

Chris Van Hoof Vice President R&D at imec and general manager of the OnePlanet Research Center in Gelderland. Chris believes preventive health, personalised nutrition, sustainable food production and reduced waste are essential enablers of improving our world for the generations to come. And he is convinced that technology (hardware and AI) are key tools to make that happen. After receiving a PhD in Electrical Engineering from the University of Leuven in 1992, Chris has held positions as manager and director at imec in highly diverse fields spanning technology, circuits, systems, data and applications. Apart from delivering industry-relevant innovative solutions to customers, his work also resulted in five startups (four in the healthcare domain). He is also full professor at the University of Leuven and imec Fellow.


A Cambrian Explosion in Electronic System Testing is Dead Ahead

Keynote Wednesday, may 26th, 2021, 16:30 – 17:30 UTC+2

Subhasish MITRA

Professor – Stanford University – Palo Alto, CA, USA

Today's test technologies mostly serve 20th-century manufacturing needs of silicon CMOS chips. In this new decade, testing is going to change radically, driven by several factors:
(a) Testing must grow beyond manufacturing defects to address robustness that end-users really care about: design bugs, reliability, and security.
(b) Today's test methods cannot meet the increasing levels of thoroughness demanded by future systems --- from (self-driving) cars to the cloud.
(c) Beyond-silicon NanoSystems create new testing challenges.

These factors create golden opportunities for new "System-Driven" test approaches that address the above seemingly diverse problems at seemingly diverse scales. Testing will then become an essential 21st-century system feature rather than a cost burden defined by the constraints of 20th-century chip manufacturing.

Subhasish Mitra is Professor of Electrical Engineering and of Computer Science at Stanford University. He directs the Stanford Robust Systems Group, leads the Computation Focus Area of the Stanford SystemX Alliance, and is a member of the Wu Tsai Neurosciences Institute.
Prof. Mitra also holds the Carnot Chair of Excellence in NanoSystems at CEA-LETI in France. His research ranges across Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences.
Results from his research group have influenced almost every contemporary electronic system, and have inspired significant government and research initiatives in multiple countries. Prof. Mitra also has consulted for major technology companies including Cisco, Google, Intel, Samsung, and Xilinx.

In the field of Robust Computing, he has created many key approaches for circuit failure prediction, on-line diagnostics, QED system validation, soft error resilience, and X-Compact test compression.
Their adoption by industry is growing rapidly, in markets ranging from cloud computing to automotive systems. His X-Compact approach has proven essential for cost-effective manufacturing and high-quality testing of almost all 21st century systems, enabling billions of dollars in cost savings.

With his students and collaborators, he demonstrated the first carbon nanotube computer. They also demonstrated the first 3D NanoSystem with computation immersed in data storage. These received wide recognition: cover of NATURE, Research Highlight to the US Congress by the NSF, and highlight as "important, scientific breakthrough" by global news organizations.

Prof. Mitra's honors include the Newton Technical Impact Award in EDA (test of time honor by ACM SIGDA and IEEE CEDA), the Semiconductor Research Corporation’s Technical Excellence Award, the Intel Achievement Award (Intel’s highest honor), and the US Presidential Early Career Award. He has published award-winning papers at major venues such as the Design Automation Conference, International Solid-State Circuits Conference, International Test Conference, Symposium on VLSI Technology, and Formal Methods in Computer-Aided Design. Stanford undergraduates have honored him several times "for being important to them." He is an ACM Fellow and an IEEE Fellow.


Secure Hardware Design: Starting from the Roots of Trust

Keynote Thursday, may 27th, 2021, 14:00 – 15:00 UTC+2

Ingrid VERBAUWHEDE

Professor – KU Leuven – Leuven, Belgium

What is "hardware" security? The network designer relies on the security of the router box. The software developer relies on the TPM (Trusted Platform Module). The circuit designer worries about side-channel attacks.At the same time, electronics shrink: sensor nodes, IOT devics, smart devices are becoming more and more available. Adding security and cryptography to these often very resource constraint devices is a challenge. This presentation will focus on Physically Unclonable Functions and True Random Number Generators, two roots of trust, and their security testing.

Dr. Ir. Ingrid Verbauwhede is a Professor in the research group COSIC of the Electrical Engineering Department of the KU Leuven. She is also adjunct professor at UCLA, USA. She received her PhD degree from the KU Leuven and was a post-doctoral researcher at UC Berkeley. At COSIC, she leads the secure embedded systems and hardware group. She is a Member of IACR and a fellow of IEEE. She was elected as member of the Royal Flemish Academy of Belgium for Science and the Arts in 2011. She is a recipient of an ERC Advanced Grant in 2016 and received the IEEE 2017 Computer Society Technical Achievement Award.

She is a pioneer in the field of efficient and secure implementations of cryptographic algorithms on many different platforms: ASIC, FPGA, embedded, cloud. With her research she bridges the gaps between electronics, the mathematics of cryptography and the security of trusted computing, including Physically Unclonable Functions and True Random Number Generators. Her group owns and operates an advanced electronic security evaluation lab. She is the author and co-author of more than 300 publications at conferences, journals, book chapters and books.

Her Google Scholar link is available from: https://scholar.google.be/citations?user=ZyG1ZGgAAAAJ&hl=en&oi=ao

Her list of publications and patents is available at www.esat.kuleuven.be/cosic/publications